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Ge gate stack passivation for MOS devices: need for atomically controlled processing

dc.contributor.authorSioncke, Sonja
dc.contributor.authorArimura, Hiroaki
dc.contributor.authorCott, Daire
dc.contributor.authorFranco, Jacopo
dc.contributor.authorCollaert, Nadine
dc.contributor.authorThean, Aaron
dc.date.accessioned2021-10-22T05:55:12Z
dc.date.available2021-10-22T05:55:12Z
dc.date.issued2014
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/24536
dc.sourceIIOimport
dc.titleGe gate stack passivation for MOS devices: need for atomically controlled processing
dc.typeMeeting abstract
dc.contributor.imecauthorArimura, Hiroaki
dc.contributor.imecauthorCott, Daire
dc.contributor.imecauthorFranco, Jacopo
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorThean, Aaron
dc.contributor.orcidimecFranco, Jacopo::0000-0002-7382-8605
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.source.peerreviewno
dc.source.conferenceJSPS International Core-to-Core Program Workshop on Atomically Controlled Processing for Ultra-large Scale Integration
dc.source.conferencedate13/11/2014
dc.source.conferencelocationLeuven Belgium
imec.availabilityPublished - imec


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