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A 70 dB SNDR 200 MS/s 2.3 mW dynamic pipelined SAR ADC in 28nm digital CMOS

dc.contributor.authorVerbruggen, Bob
dc.contributor.authorDeguchi, Kazuaki
dc.contributor.authorMalki, Badr
dc.contributor.authorCraninckx, Jan
dc.date.accessioned2021-10-22T07:43:22Z
dc.date.available2021-10-22T07:43:22Z
dc.date.issued2014
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/24755
dc.sourceIIOimport
dc.titleA 70 dB SNDR 200 MS/s 2.3 mW dynamic pipelined SAR ADC in 28nm digital CMOS
dc.typeProceedings paper
dc.contributor.imecauthorCraninckx, Jan
dc.contributor.orcidimecCraninckx, Jan::0000-0002-3980-0203
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage242
dc.source.endpage243
dc.source.conferenceIEEE Symposium on VLSI Circuits
dc.source.conferencedate9/06/2014
dc.source.conferencelocationHonolulu, HI USA
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6858451&contentType=Conference+Publications
imec.availabilityPublished - open access


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