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Optimization of Ru based hybrid floating gate for planar NAND flash

dc.contributor.authorBreuil, Laurent
dc.contributor.authorLisoni, Judit
dc.contributor.authorBlomme, Pieter
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorVan Houdt, Jan
dc.date.accessioned2021-10-22T18:35:27Z
dc.date.available2021-10-22T18:35:27Z
dc.date.issued2015
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25019
dc.sourceIIOimport
dc.titleOptimization of Ru based hybrid floating gate for planar NAND flash
dc.typeProceedings paper
dc.contributor.imecauthorBreuil, Laurent
dc.contributor.imecauthorBlomme, Pieter
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.orcidimecBreuil, Laurent::0000-0003-2869-1651
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage105
dc.source.endpage108
dc.source.conferenceIEEE 7th International Memory Workshop - IMW
dc.source.conferencedate17/05/2015
dc.source.conferencelocationMonterey, CA USA
imec.availabilityPublished - open access


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