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Extraction of the lateral position of border traps in nanoscale MOSFETs

dc.contributor.authorIllarionov, Yury
dc.contributor.authorBina, Markus
dc.contributor.authorTyaginov, Stanislav
dc.contributor.authorRott, Karina
dc.contributor.authorKaczer, Ben
dc.contributor.authorReisinger, Hans
dc.contributor.authorGrasser, Tibor
dc.date.accessioned2021-10-22T19:49:57Z
dc.date.available2021-10-22T19:49:57Z
dc.date.issued2015
dc.identifier.issn0018-9383
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25412
dc.sourceIIOimport
dc.titleExtraction of the lateral position of border traps in nanoscale MOSFETs
dc.typeJournal article
dc.contributor.imecauthorTyaginov, Stanislav
dc.contributor.imecauthorKaczer, Ben
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage2730
dc.source.endpage2737
dc.source.journalIEEE Transactions on Electron Devices
dc.source.issue9
dc.source.volume62
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7194762
imec.availabilityPublished - open access


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