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Threshold voltage modeling for DT UTBB SOI in different operation modes

dc.contributor.authorItocazu, Vitor T.
dc.contributor.authorSasaki, Katia
dc.contributor.authorManini, M.B.
dc.contributor.authorSonnenberg, Victor
dc.contributor.authorMartino, Joao A.
dc.contributor.authorSimoen, Eddy
dc.contributor.authorClaeys, Cor
dc.date.accessioned2021-10-22T19:51:43Z
dc.date.available2021-10-22T19:51:43Z
dc.date.issued2015
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25418
dc.sourceIIOimport
dc.titleThreshold voltage modeling for DT UTBB SOI in different operation modes
dc.typeProceedings paper
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.source.peerreviewyes
dc.source.beginpage109
dc.source.endpage115
dc.source.conferenceAdvanced CMOS-Compatible Semicondiuctor Devives 17
dc.source.conferencedate24/05/2015
dc.source.conferencelocationChicago, IL USA
dc.identifier.urlhttp://ecst.ecsdl.org/content/66/5/109.abstract
imec.availabilityPublished - imec
imec.internalnotesECS Transactions; Vol. 66, Issue 5


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