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Simplistic simulation-based device-VT-targeting technique to determine technology high-density LELE-gate-patterned FinFET SRAM in sub-10 nm era

dc.contributor.authorSakhare, Sushil
dc.contributor.authorMiyaguchi, Kenichi
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorMercha, Abdelkarim
dc.date.accessioned2021-10-22T22:28:30Z
dc.date.available2021-10-22T22:28:30Z
dc.date.issued2015
dc.identifier.issn0018-9383
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25851
dc.sourceIIOimport
dc.titleSimplistic simulation-based device-VT-targeting technique to determine technology high-density LELE-gate-patterned FinFET SRAM in sub-10 nm era
dc.typeJournal article
dc.contributor.imecauthorMiyaguchi, Kenichi
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.orcidimecMiyaguchi, Kenichi::0000-0002-7073-6457
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.source.peerreviewyes
dc.source.beginpage1716
dc.source.endpage1724
dc.source.journalIEEE Transactions on Electron Devices
dc.source.issue6
dc.source.volume62
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6980098
imec.availabilityPublished - imec


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