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A +70dBm IIP3 single-ended electrical-balance duplexer in 0.18μm SOI CMOS

dc.contributor.authorvan Liempd, Barend
dc.contributor.authorHershberg, Benjamin
dc.contributor.authorRaczkowski, Kuba
dc.contributor.authorAriumi, Saneaki
dc.contributor.authorKarthaus, Udo
dc.contributor.authorBink, Karl-Frederik
dc.contributor.authorCraninckx, Jan
dc.date.accessioned2021-10-23T00:13:50Z
dc.date.available2021-10-23T00:13:50Z
dc.date.issued2015
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/26082
dc.sourceIIOimport
dc.titleA +70dBm IIP3 single-ended electrical-balance duplexer in 0.18μm SOI CMOS
dc.typeProceedings paper
dc.contributor.imecauthorvan Liempd, Barend
dc.contributor.imecauthorHershberg, Benjamin
dc.contributor.imecauthorCraninckx, Jan
dc.contributor.orcidimecvan Liempd, Barend::0000-0001-6877-8116
dc.contributor.orcidimecCraninckx, Jan::0000-0002-3980-0203
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage32
dc.source.endpage33
dc.source.conferenceIEEE International Solid-State Circuits Conference - ISSCC
dc.source.conferencedate22/02/2015
dc.source.conferencelocationSan Francisco, CA USA
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7062851
imec.availabilityPublished - imec


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