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dc.contributor.authorVinicius de Oliveira, Alberto
dc.contributor.authorAgopian, G.D.
dc.contributor.authorMartino, J.
dc.contributor.authorSimoen, Eddy
dc.contributor.authorClaeys, Cor
dc.contributor.authorMertens, Hans
dc.contributor.authorCollaert, Nadine
dc.contributor.authorThean, Aaron
dc.date.accessioned2021-10-23T16:51:40Z
dc.date.available2021-10-23T16:51:40Z
dc.date.issued2016
dc.identifier.issn1807-1953
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/27550
dc.sourceIIOimport
dc.titleImpact of gate stack layer composition on dynamic threshold voltage and analog parameters of Ge pMOSFETs
dc.typeJournal article
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorMertens, Hans
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorThean, Aaron
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.source.peerreviewyes
dc.source.beginpage7
dc.source.endpage12
dc.source.journalJournal of Integrated Circuits and Systems
dc.source.issue1
dc.source.volume11
imec.availabilityPublished - imec


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