dc.contributor.author | Ciofi, Ivan | |
dc.contributor.author | Roussel, Philippe | |
dc.contributor.author | Saad, Yves | |
dc.contributor.author | Moroz, Victor | |
dc.contributor.author | Hu, Jojo | |
dc.contributor.author | Baert, Rogier | |
dc.contributor.author | Croes, Kristof | |
dc.contributor.author | Contino, Antonino | |
dc.contributor.author | Vandersmissen, Kevin | |
dc.contributor.author | Gao, Weimin | |
dc.contributor.author | Matagne, Philippe | |
dc.contributor.author | Badaroglu, Mustafa | |
dc.contributor.author | Wilson, Chris | |
dc.contributor.author | Mocuta, Dan | |
dc.contributor.author | Tokei, Zsolt | |
dc.date.accessioned | 2021-10-24T03:29:52Z | |
dc.date.available | 2021-10-24T03:29:52Z | |
dc.date.issued | 2017 | |
dc.identifier.issn | 0018-9383 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/28036 | |
dc.source | IIOimport | |
dc.title | Modeling of via resistance for advanced technology nodes | |
dc.type | Journal article | |
dc.contributor.imecauthor | Ciofi, Ivan | |
dc.contributor.imecauthor | Roussel, Philippe | |
dc.contributor.imecauthor | Baert, Rogier | |
dc.contributor.imecauthor | Croes, Kristof | |
dc.contributor.imecauthor | Contino, Antonino | |
dc.contributor.imecauthor | Vandersmissen, Kevin | |
dc.contributor.imecauthor | Matagne, Philippe | |
dc.contributor.imecauthor | Badaroglu, Mustafa | |
dc.contributor.imecauthor | Wilson, Chris | |
dc.contributor.imecauthor | Tokei, Zsolt | |
dc.contributor.orcidimec | Ciofi, Ivan::0000-0003-1374-4116 | |
dc.contributor.orcidimec | Roussel, Philippe::0000-0002-0402-8225 | |
dc.contributor.orcidimec | Croes, Kristof::0000-0002-3955-0638 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 2306 | |
dc.source.endpage | 2313 | |
dc.source.journal | IEEE Transactions on Electron Devices | |
dc.source.issue | 5 | |
dc.source.volume | 64 | |
dc.identifier.url | http://ieeexplore.ieee.org/document/7895180/ | |
imec.availability | Published - imec | |