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Impact of backside process on high aspect ratio via-middle Cu through silicon via reliability

dc.contributor.authorLi, Yunlong
dc.contributor.authorVan Huylenbroeck, Stefaan
dc.contributor.authorDe Vos, Joeri
dc.contributor.authorStucchi, Michele
dc.contributor.authorCroes, Kristof
dc.contributor.authorBeyer, Gerald
dc.contributor.authorBeyne, Eric
dc.date.accessioned2021-10-24T07:54:14Z
dc.date.available2021-10-24T07:54:14Z
dc.date.issued2017-06
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/28813
dc.sourceIIOimport
dc.titleImpact of backside process on high aspect ratio via-middle Cu through silicon via reliability
dc.typeProceedings paper
dc.contributor.imecauthorLi, Yunlong
dc.contributor.imecauthorVan Huylenbroeck, Stefaan
dc.contributor.imecauthorDe Vos, Joeri
dc.contributor.imecauthorStucchi, Michele
dc.contributor.imecauthorCroes, Kristof
dc.contributor.imecauthorBeyer, Gerald
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecLi, Yunlong::0000-0003-4791-4013
dc.contributor.orcidimecVan Huylenbroeck, Stefaan::0000-0001-9978-3575
dc.contributor.orcidimecDe Vos, Joeri::0000-0002-9332-9336
dc.contributor.orcidimecCroes, Kristof::0000-0002-3955-0638
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage508
dc.source.endpage512
dc.source.conferenceInternational Conference on Electronics Packaging - ICEP
dc.source.conferencedate19/04/2017
dc.source.conferencelocationYamagata Japan
dc.identifier.urlhttp://ieeexplore.ieee.org/document/7939434/
imec.availabilityPublished - open access


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