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dc.contributor.authorO'Sullivan, Barry
dc.contributor.authorRitzenthaler, Romain
dc.contributor.authorSimoen, Eddy
dc.contributor.authorDentoni Litta, Eugenio
dc.contributor.authorSchram, Tom
dc.contributor.authorVaisman Chasin, Adrian
dc.contributor.authorLinten, Dimitri
dc.contributor.authorHoriguchi, Naoto
dc.contributor.authorMachkaoutsan, Vladimir
dc.contributor.authorFazan, Pierre
dc.contributor.authorLi, Y
dc.date.accessioned2021-10-24T10:32:04Z
dc.date.available2021-10-24T10:32:04Z
dc.date.issued2017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/29122
dc.sourceIIOimport
dc.titleGate stack engineering to enhance high- $j/metal gate reliability for DRAM I/O applications
dc.typeProceedings paper
dc.contributor.imecauthorO'Sullivan, Barry
dc.contributor.imecauthorRitzenthaler, Romain
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorDentoni Litta, Eugenio
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorVaisman Chasin, Adrian
dc.contributor.imecauthorLinten, Dimitri
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.imecauthorMachkaoutsan, Vladimir
dc.contributor.imecauthorFazan, Pierre
dc.contributor.orcidimecO'Sullivan, Barry::0000-0002-9036-8241
dc.contributor.orcidimecRitzenthaler, Romain::0000-0002-8615-3272
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimecSchram, Tom::0000-0003-1533-7055
dc.contributor.orcidimecVaisman Chasin, Adrian::0000-0002-9940-0260
dc.contributor.orcidimecLinten, Dimitri::0000-0001-8434-1838
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpageDG-8.1
dc.source.endpageDG-8.5
dc.source.conferenceIEEE International Reliability Physics Symposium - IRPS
dc.source.conferencedate2/04/2017
dc.source.conferencelocationMonterey, CA USA
dc.identifier.urlhttp://ieeexplore.ieee.org/document/7936365/
imec.availabilityPublished - open access


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