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A compact model for the grounded-gate nMOS transistor behaviour under CDM ESD stress

dc.contributor.authorRuss, Christian
dc.contributor.authorVerhaege, Koen
dc.contributor.authorBock, Karlheinz
dc.contributor.authorRoussel, Philippe
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorMaes, Herman
dc.date.accessioned2021-10-01T08:50:10Z
dc.date.available2021-10-01T08:50:10Z
dc.date.issued1998
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/2918
dc.sourceIIOimport
dc.titleA compact model for the grounded-gate nMOS transistor behaviour under CDM ESD stress
dc.typeJournal article
dc.contributor.imecauthorRoussel, Philippe
dc.contributor.imecauthorGroeseneken, Guido
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage351
dc.source.endpage381
dc.source.journalJournal of Electrostatics
dc.source.issue4
dc.source.volume42
imec.availabilityPublished - open access


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