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Process window discovery, expansion and control of design hotspots susceptible to overlay failures

dc.contributor.authorSah, Kaushik
dc.contributor.authorCross, Andrew
dc.contributor.authorMani, Antonio
dc.contributor.authorVan Den Heuvel, Dieter
dc.contributor.authorFoubert, Philippe
dc.date.accessioned2021-10-24T12:40:32Z
dc.date.available2021-10-24T12:40:32Z
dc.date.issued2017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/29350
dc.sourceIIOimport
dc.titleProcess window discovery, expansion and control of design hotspots susceptible to overlay failures
dc.typeProceedings paper
dc.contributor.imecauthorSah, Kaushik
dc.contributor.imecauthorCross, Andrew
dc.contributor.imecauthorMani, Antonio
dc.contributor.imecauthorVan Den Heuvel, Dieter
dc.contributor.imecauthorFoubert, Philippe
dc.source.peerreviewyes
dc.source.conference28th Annual SEMI Advanced Semiconductor Manufacturing Conference - ASMC
dc.source.conferencedate15/05/2017
dc.source.conferencelocationSaratoga Springs, NY USA
dc.identifier.urlhttps://ieeexplore.ieee.org/document/7969272/
imec.availabilityPublished - imec


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