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ADE assembler flow for rapid design of high-speed low-power circuits

dc.contributor.authorSoenen, Wouter
dc.contributor.authorMoeneclaey, Bart
dc.contributor.authorYin, Xin
dc.contributor.authorBauwelinck, Johan
dc.date.accessioned2021-10-24T13:53:28Z
dc.date.available2021-10-24T13:53:28Z
dc.date.issued2017-05
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/29470
dc.sourceIIOimport
dc.titleADE assembler flow for rapid design of high-speed low-power circuits
dc.typeMeeting abstract
dc.contributor.imecauthorMoeneclaey, Bart
dc.contributor.imecauthorYin, Xin
dc.contributor.imecauthorBauwelinck, Johan
dc.contributor.orcidimecMoeneclaey, Bart::0000-0002-9444-6235
dc.contributor.orcidimecYin, Xin::0000-0002-9672-6652
dc.contributor.orcidimecBauwelinck, Johan::0000-0001-5254-2408
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage2
dc.source.conferenceCDNLive, Cadence User Conference - EMEA
dc.source.conferencedate15/05/2017
dc.source.conferencelocationMünchen Germany
imec.availabilityPublished - imec


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