| dc.contributor.author | Van Houdt, Jan | |
| dc.date.accessioned | 2021-10-24T16:21:08Z | |
| dc.date.available | 2021-10-24T16:21:08Z | |
| dc.date.issued | 2017 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/29704 | |
| dc.source | IIOimport | |
| dc.title | Memory technology for the terabit era: from 2D to 3D | |
| dc.type | Proceedings paper | |
| dc.contributor.imecauthor | Van Houdt, Jan | |
| dc.contributor.orcidimec | Van Houdt, Jan::0000-0003-1381-6925 | |
| dc.date.embargo | 9999-12-31 | |
| dc.source.peerreview | yes | |
| dc.source.beginpage | T2-1 | |
| dc.source.conference | IEEE Symposium on VLSI Technology | |
| dc.source.conferencedate | 5/06/2017 | |
| dc.source.conferencelocation | Kyoto Japan | |
| dc.identifier.url | https://ieeexplore.ieee.org/document/7998186/ | |
| imec.availability | Published - open access | |
