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Investigation of wafer level packaging schemes for 3D RF interposer multi-chip module

dc.contributor.authorVereecke, Bart
dc.contributor.authorSoussan, Philippe
dc.contributor.authorZhu, Jian
dc.date.accessioned2021-10-24T17:40:48Z
dc.date.available2021-10-24T17:40:48Z
dc.date.issued2017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/29824
dc.sourceIIOimport
dc.titleInvestigation of wafer level packaging schemes for 3D RF interposer multi-chip module
dc.typeProceedings paper
dc.contributor.imecauthorVereecke, Bart
dc.contributor.imecauthorSoussan, Philippe
dc.contributor.orcidimecSoussan, Philippe::0000-0002-1347-6978
dc.source.peerreviewyes
dc.source.beginpage258
dc.source.endpage262
dc.source.conferenceIMAPS International Symposium on Microelectronics
dc.source.conferencedate9/10/2017
dc.source.conferencelocationRaleigh, NC USA
dc.identifier.urlhttp://www.imapsource.org/doi/abs/10.4071/isom-2017-WA41_030?code=imap-site
imec.availabilityPublished - imec


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