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A study on substrate noise coupling among TSVs in 3D chip stack

dc.contributor.authorAraga, Yuuki
dc.contributor.authorNagata, Makoto
dc.contributor.authorDe Vos, Joeri
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorBeyne, Eric
dc.date.accessioned2021-10-25T16:34:11Z
dc.date.available2021-10-25T16:34:11Z
dc.date.issued2018
dc.identifier.issn1349-2543
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/30141
dc.sourceIIOimport
dc.titleA study on substrate noise coupling among TSVs in 3D chip stack
dc.typeJournal article
dc.contributor.imecauthorDe Vos, Joeri
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecDe Vos, Joeri::0000-0002-9332-9336
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage20180460
dc.source.journalIEICE Electronics Express
dc.source.issue13
dc.source.volume15
dc.identifier.urlhttps://doi.org/10.1587/elex.15.20180460
imec.availabilityPublished - open access


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