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dc.contributor.authorCapogreco, Elena
dc.contributor.authorWitters, Liesbeth
dc.contributor.authorArimura, Hiroaki
dc.contributor.authorSebaai, Farid
dc.contributor.authorPorret, Clément
dc.contributor.authorHikavyy, Andriy
dc.contributor.authorLoo, Roger
dc.contributor.authorMilenin, Alexey
dc.contributor.authorEneman, Geert
dc.contributor.authorFavia, Paola
dc.contributor.authorBender, Hugo
dc.contributor.authorWostyn, Kurt
dc.contributor.authorDentoni Litta, Eugenio
dc.contributor.authorSchulze, Andreas
dc.contributor.authorVrancken, Christa
dc.contributor.authorOpdebeeck, Ann
dc.contributor.authorMitard, Jerome
dc.contributor.authorLanger, Robert
dc.contributor.authorHolsteyns, Frank
dc.contributor.authorWaldron, Niamh
dc.contributor.authorBarla, Kathy
dc.contributor.authorDe Heyn, Vincent
dc.contributor.authorMocuta, Dan
dc.contributor.authorCollaert, Nadine
dc.date.accessioned2021-10-25T17:02:32Z
dc.date.available2021-10-25T17:02:32Z
dc.date.issued2018
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/30358
dc.sourceIIOimport
dc.titleFirst demonstration of vertically-stacked gate-all-around highly-strained germanium nanowire p-FETs
dc.typeProceedings paper
dc.contributor.imecauthorCapogreco, Elena
dc.contributor.imecauthorWitters, Liesbeth
dc.contributor.imecauthorArimura, Hiroaki
dc.contributor.imecauthorSebaai, Farid
dc.contributor.imecauthorPorret, Clément
dc.contributor.imecauthorHikavyy, Andriy
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorMilenin, Alexey
dc.contributor.imecauthorEneman, Geert
dc.contributor.imecauthorFavia, Paola
dc.contributor.imecauthorBender, Hugo
dc.contributor.imecauthorWostyn, Kurt
dc.contributor.imecauthorDentoni Litta, Eugenio
dc.contributor.imecauthorVrancken, Christa
dc.contributor.imecauthorOpdebeeck, Ann
dc.contributor.imecauthorMitard, Jerome
dc.contributor.imecauthorLanger, Robert
dc.contributor.imecauthorHolsteyns, Frank
dc.contributor.imecauthorWaldron, Niamh
dc.contributor.imecauthorBarla, Kathy
dc.contributor.imecauthorDe Heyn, Vincent
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.orcidimecPorret, Clément::0000-0002-4561-348X
dc.contributor.orcidimecHikavyy, Andriy::0000-0002-8201-075X
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.contributor.orcidimecMilenin, Alexey::0000-0003-0747-0462
dc.contributor.orcidimecEneman, Geert::0000-0002-5849-3384
dc.contributor.orcidimecFavia, Paola::0000-0002-1019-3497
dc.contributor.orcidimecWostyn, Kurt::0000-0003-3995-0292
dc.contributor.orcidimecMitard, Jerome::0000-0002-7422-079X
dc.contributor.orcidimecLanger, Robert::0000-0002-1132-3468
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage193
dc.source.endpage194
dc.source.conferenceIEEE Symposium on VLSI Technology
dc.source.conferencedate18/06/2018
dc.source.conferencelocationHonolulu, HI USA
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8510645
imec.availabilityPublished - open access


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