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Resist coating and developing process technology toward EUV manufacturing sub 7nm node

dc.contributor.authorKamei, Yuya
dc.contributor.authorShiozawa, Takahiro
dc.contributor.authorKawakami, Shinichiro
dc.contributor.authorShite, Hideo
dc.contributor.authorIchinomiya, Hiroshi
dc.contributor.authorHashimoto, Yusaku
dc.contributor.authorEnomoto, Masashi
dc.contributor.authorNafus, Kathleen
dc.contributor.authorSonoda, Akihiko
dc.contributor.authorDemand, Marc
dc.contributor.authorFoubert, Philippe
dc.date.accessioned2021-10-25T20:40:21Z
dc.date.available2021-10-25T20:40:21Z
dc.date.issued2018
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/31006
dc.sourceIIOimport
dc.titleResist coating and developing process technology toward EUV manufacturing sub 7nm node
dc.typeProceedings paper
dc.contributor.imecauthorNafus, Kathleen
dc.contributor.imecauthorDemand, Marc
dc.contributor.imecauthorFoubert, Philippe
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage4
dc.source.conferenceInternational Symposium on Semiconductor Manufacturing (ISSM)
dc.source.conferencedate10/12/2018
dc.source.conferencelocationTokyo Japan
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8651154
imec.availabilityPublished - open access


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