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A high voltage p-type drain extended MOS in a low voltage sub-micron CMOS technology

dc.contributor.authorVermandel, Miguel
dc.contributor.authorDe Backere, Christof
dc.contributor.authorVan Calster, Andre
dc.contributor.authorWitters, Johan
dc.contributor.authorTack, M.
dc.date.accessioned2021-10-01T09:38:57Z
dc.date.available2021-10-01T09:38:57Z
dc.date.issued1998
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/3124
dc.sourceIIOimport
dc.titleA high voltage p-type drain extended MOS in a low voltage sub-micron CMOS technology
dc.typeProceedings paper
dc.contributor.imecauthorVan Calster, Andre
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage492
dc.source.endpage495
dc.source.conferenceProceedings of the 28th European Solid-State Device Research Conference - ESSDERC
dc.source.conferencedate8/09/1998
dc.source.conferencelocationBordeaux France
imec.availabilityPublished - open access


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