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Solutions to multiple probing challenges for test access to multi-die stacked integrated circuits

dc.contributor.authorMarinissen, Erik Jan
dc.contributor.authorFodor, Ferenc
dc.contributor.authorPodpod, Arnita
dc.contributor.authorStucchi, Michele
dc.contributor.authorJian, Yu-Rong
dc.contributor.authorWu, Cheng-Wen
dc.date.accessioned2021-10-25T22:59:36Z
dc.date.available2021-10-25T22:59:36Z
dc.date.issued2018-11
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/31290
dc.sourceIIOimport
dc.titleSolutions to multiple probing challenges for test access to multi-die stacked integrated circuits
dc.typeProceedings paper
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.imecauthorFodor, Ferenc
dc.contributor.imecauthorPodpod, Arnita
dc.contributor.imecauthorStucchi, Michele
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage10
dc.source.conferenceIEEE International Test Conference - ITC'18
dc.source.conferencedate28/10/2018
dc.source.conferencelocationPhoenix, AZ USA
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8626258
imec.availabilityPublished - imec


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