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Optimisation of critical parameters in a low cost, high performance deep submicron CMOS technology

dc.contributor.authorBadenes, Gonçal
dc.contributor.authorPerello, Carles
dc.contributor.authorRupp, Andreas
dc.contributor.authorVandamme, Ewout
dc.contributor.authorAugendre, Emmanuel
dc.contributor.authorPochet, Sandrine
dc.contributor.authorDeferm, Ludo
dc.date.accessioned2021-10-06T10:41:13Z
dc.date.available2021-10-06T10:41:13Z
dc.date.issued1999
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/3197
dc.sourceIIOimport
dc.titleOptimisation of critical parameters in a low cost, high performance deep submicron CMOS technology
dc.typeProceedings paper
dc.contributor.imecauthorDeferm, Ludo
dc.source.peerreviewno
dc.source.beginpage628
dc.source.endpage631
dc.source.conferenceESSDERC'99 - Proceedings of the 29th European Solid-State Device Research Conference
dc.source.conferencedate13/09/1999
dc.source.conferencelocationLeuven Belgium
imec.availabilityPublished - imec


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