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Challenges and opportunities for vertical nanowire FETs: device design and fabrication

dc.contributor.authorVeloso, Anabela
dc.contributor.authorMatagne, Philippe
dc.contributor.authorHuynh Bao, Trong
dc.contributor.authorEneman, Geert
dc.contributor.authorLoo, Roger
dc.contributor.authorWostyn, Kurt
dc.contributor.authorBrus, Stephan
dc.contributor.authorBoemmels, Juergen
dc.contributor.authorMocuta, Dan
dc.contributor.authorRyckaert, Julien
dc.date.accessioned2021-10-26T08:11:48Z
dc.date.available2021-10-26T08:11:48Z
dc.date.issued2018
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/32167
dc.sourceIIOimport
dc.titleChallenges and opportunities for vertical nanowire FETs: device design and fabrication
dc.typeProceedings paper
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorMatagne, Philippe
dc.contributor.imecauthorEneman, Geert
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorWostyn, Kurt
dc.contributor.imecauthorBrus, Stephan
dc.contributor.imecauthorBoemmels, Juergen
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.orcidimecEneman, Geert::0000-0002-5849-3384
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.contributor.orcidimecWostyn, Kurt::0000-0003-3995-0292
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage159
dc.source.endpage160
dc.source.conference50th International Conference on Solid State Devices and Materials - SSDM
dc.source.conferencedate9/09/2018
dc.source.conferencelocationTokyo Japan
dc.identifier.urlhttp://www.ssdm.jp/SSDM2018_TechnicalProgram-All_Sep11-13.pdf?d=20180824
imec.availabilityPublished - open access


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