Show simple item record

Exploration of segmented bus as scalable global interconnect for neuromorphic computing

dc.contributor.authorBalaji, Adarsha
dc.contributor.authorWu, Yuefeng
dc.contributor.authorDas, Anup
dc.contributor.authorCatthoor, Francky
dc.contributor.authorSchaafsma, Siebren
dc.date.accessioned2021-10-27T07:28:49Z
dc.date.available2021-10-27T07:28:49Z
dc.date.issued2019
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/32482
dc.sourceIIOimport
dc.titleExploration of segmented bus as scalable global interconnect for neuromorphic computing
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.imecauthorSchaafsma, Siebren
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewyes
dc.source.conferenceGLSVLSI '19: Proceedings of the 2019 on Great Lakes Symposium on VLSI
dc.source.conferencedate1/05/2019
dc.source.conferencelocationTysons Corner, VA USA
dc.identifier.urlhttps://doi.org/10.1145/3299874.3319491
imec.availabilityPublished - imec


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following collection(s)

Show simple item record