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A methodology and design environment for DSP ASIC fixed point refinement

dc.contributor.authorCmar, Radim
dc.contributor.authorRynders, Luc
dc.contributor.authorSchaumont, Patrick
dc.contributor.authorVernalde, Serge
dc.contributor.authorBolsens, Ivo
dc.date.accessioned2021-10-06T10:48:45Z
dc.date.available2021-10-06T10:48:45Z
dc.date.issued1999
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/3303
dc.sourceIIOimport
dc.titleA methodology and design environment for DSP ASIC fixed point refinement
dc.typeProceedings paper
dc.contributor.imecauthorRynders, Luc
dc.contributor.imecauthorVernalde, Serge
dc.source.peerreviewno
dc.source.beginpage271
dc.source.endpage276
dc.source.conferenceProceedings Design and Test in Europe Conference; March 1999; Munich, Germany.
imec.availabilityPublished - imec


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