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Failure probability of a FinFET-based SRAM cell utilizing the most probable failure point

dc.contributor.authorNoltsis, Michalis
dc.contributor.authorMaragkoudaki, Eleni
dc.contributor.authorRodopoulos, Dimitrios
dc.contributor.authorCatthoor, Francky
dc.contributor.authorSoudris, Dimitrios
dc.date.accessioned2021-10-27T14:52:27Z
dc.date.available2021-10-27T14:52:27Z
dc.date.issued2019
dc.identifier.issn0167-9260
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/33678
dc.sourceIIOimport
dc.titleFailure probability of a FinFET-based SRAM cell utilizing the most probable failure point
dc.typeJournal article
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewyes
dc.source.beginpage111
dc.source.endpage119
dc.source.journalIntegration, the VLSI Journal
dc.source.volume69
dc.identifier.urlhttps://doi.org/10.1016/j.vlsi.2018.03.016
imec.availabilityPublished - imec


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