dc.contributor.author | Simoen, Eddy | |
dc.contributor.author | O'Sullivan, Barry | |
dc.contributor.author | Ritzenthaler, Romain | |
dc.contributor.author | Dentoni Litta, Eugenio | |
dc.contributor.author | Schram, Tom | |
dc.contributor.author | Horiguchi, Naoto | |
dc.contributor.author | Claeys, Cor | |
dc.date.accessioned | 2021-10-27T18:23:04Z | |
dc.date.available | 2021-10-27T18:23:04Z | |
dc.date.issued | 2019 | |
dc.identifier.issn | 0268-1242 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/34010 | |
dc.source | IIOimport | |
dc.title | Can we optimize the gate oxide quality of DRAM input/output pMOSFETs by a post-deposition treatment? | |
dc.type | Journal article | |
dc.contributor.imecauthor | Simoen, Eddy | |
dc.contributor.imecauthor | O'Sullivan, Barry | |
dc.contributor.imecauthor | Ritzenthaler, Romain | |
dc.contributor.imecauthor | Dentoni Litta, Eugenio | |
dc.contributor.imecauthor | Schram, Tom | |
dc.contributor.imecauthor | Horiguchi, Naoto | |
dc.contributor.orcidimec | Simoen, Eddy::0000-0002-5218-4046 | |
dc.contributor.orcidimec | O'Sullivan, Barry::0000-0002-9036-8241 | |
dc.contributor.orcidimec | Ritzenthaler, Romain::0000-0002-8615-3272 | |
dc.contributor.orcidimec | Schram, Tom::0000-0003-1533-7055 | |
dc.contributor.orcidimec | Horiguchi, Naoto::0000-0001-5490-0416 | |
dc.date.embargo | 9999-12-31 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 15017 | |
dc.source.journal | Semiconductor Science and Technology | |
dc.source.issue | 1 | |
dc.source.volume | 34 | |
dc.identifier.url | https://iopscience.iop.org/article/10.1088/1361-6641/aaf4dc | |
imec.availability | Published - open access | |