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Impact of sidewall etching on the dynamic performance of GaN-on-Si E-mode transistors

dc.contributor.authorTajalli, A.
dc.contributor.authorCanato, E.
dc.contributor.authorNardo, A.
dc.contributor.authorMeneghini, M.
dc.contributor.authorStockman, Arno
dc.contributor.authorMoens, P.
dc.contributor.authorZanoni, E.
dc.contributor.authorMeneghesso, G.
dc.date.accessioned2021-10-27T19:22:17Z
dc.date.available2021-10-27T19:22:17Z
dc.date.issued2019
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/34098
dc.sourceIIOimport
dc.titleImpact of sidewall etching on the dynamic performance of GaN-on-Si E-mode transistors
dc.typeProceedings paper
dc.contributor.imecauthorStockman, Arno
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage6
dc.source.conference2019 IEEE International Reliability Physics Symposium (IRPS)
dc.source.conferencedate31/03/2019
dc.source.conferencelocationMonterey, CA USA
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8720445
imec.availabilityPublished - open access


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