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dc.contributor.authorVeloso, Anabela
dc.contributor.authorHuynh Bao, Trong
dc.contributor.authorMatagne, Philippe
dc.contributor.authorJang, Doyoung
dc.contributor.authorHoriguchi, Naoto
dc.contributor.authorRyckaert, Julien
dc.contributor.authorMocuta, Dan
dc.date.accessioned2021-10-27T22:17:30Z
dc.date.available2021-10-27T22:17:30Z
dc.date.issued2019
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/34344
dc.sourceIIOimport
dc.titleNanowire & nanosheet FETs for ultra-scaled, high-density logic and memory applications
dc.typeProceedings paper
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorMatagne, Philippe
dc.contributor.imecauthorJang, Doyoung
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage4
dc.source.conference2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)
dc.source.conferencedate1/04/2019
dc.source.conferencelocationGrenoble France
dc.identifier.urlhttps://ieeexplore.ieee.org/document/9041857
imec.availabilityPublished - imec


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