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Process-induced power-performance variability in sub-5nm III-V tunnel FETs

dc.contributor.authorXiang, Yang
dc.contributor.authorVerhulst, Anne
dc.contributor.authorYakimets, Dmitry
dc.contributor.authorParvais, Bertrand
dc.contributor.authorMocuta, Anda
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-27T23:50:05Z
dc.date.available2021-10-27T23:50:05Z
dc.date.issued2019-04
dc.identifier.issn0018-9383
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/34467
dc.sourceIIOimport
dc.titleProcess-induced power-performance variability in sub-5nm III-V tunnel FETs
dc.typeJournal article
dc.contributor.imecauthorXiang, Yang
dc.contributor.imecauthorVerhulst, Anne
dc.contributor.imecauthorYakimets, Dmitry
dc.contributor.imecauthorParvais, Bertrand
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecXiang, Yang::0000-0003-0091-6935
dc.contributor.orcidimecVerhulst, Anne::0000-0002-3742-9017
dc.contributor.orcidimecParvais, Bertrand::0000-0003-0769-7069
dc.contributor.orcidimecGroeseneken, Guido::0000-0003-3763-2098
dc.identifier.doi10.1109/TED.2019.2909217
dc.source.peerreviewyes
dc.source.beginpage2802
dc.source.endpage2808
dc.source.journalIEEE Transactions on Electron Devices
dc.source.issue6
dc.source.volume66
imec.availabilityPublished - imec


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