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Verification of finite-state-machine refinements using a symbolic technology

dc.contributor.authorHendricx, Stefan
dc.contributor.authorClaesen, Luc
dc.date.accessioned2021-10-06T11:18:42Z
dc.date.available2021-10-06T11:18:42Z
dc.date.issued1999
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/3499
dc.sourceIIOimport
dc.titleVerification of finite-state-machine refinements using a symbolic technology
dc.typeProceedings paper
dc.source.peerreviewno
dc.source.beginpage326
dc.source.endpage329
dc.source.conferenceCorrect Hardware Design and Verification Methods. Proceedings10th IFIP WG10.5 Advanced Research Working Conference, CHARME'99.
imec.availabilityPublished - imec


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