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A reversible-logic based architecture for artificial neural network

dc.contributor.authorDey, Bappaditya
dc.contributor.authorKhalil, K.
dc.contributor.authorKumar, A.
dc.contributor.authorBayoumi, M.
dc.date.accessioned2021-10-28T21:19:41Z
dc.date.available2021-10-28T21:19:41Z
dc.date.issued2020
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/35050
dc.sourceIIOimport
dc.titleA reversible-logic based architecture for artificial neural network
dc.typeProceedings paper
dc.contributor.imecauthorDey, Bappaditya
dc.contributor.orcidimecDey, Bappaditya::0000-0002-0886-137X
dc.source.peerreviewyes
dc.source.conference63rd IEEE International Midwest Symposium on Circuits and Systems
dc.source.conferencedate9/08/2020
dc.source.conferencelocationSpringfield, MA USA
dc.identifier.urlhttps://ieeexplore.ieee.org/document/9184662
imec.availabilityPublished - imec


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