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Effect of Si surface roughness on the current-voltage characteristics of ultra-thin gate oxides

dc.contributor.authorHoussa, Michel
dc.contributor.authorNigam, Tanya
dc.contributor.authorMertens, Paul
dc.contributor.authorHeyns, Marc
dc.date.accessioned2021-10-06T11:23:31Z
dc.date.available2021-10-06T11:23:31Z
dc.date.issued1999
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/3523
dc.sourceIIOimport
dc.titleEffect of Si surface roughness on the current-voltage characteristics of ultra-thin gate oxides
dc.typeProceedings paper
dc.contributor.imecauthorHoussa, Michel
dc.contributor.imecauthorMertens, Paul
dc.contributor.imecauthorHeyns, Marc
dc.contributor.orcidimecHoussa, Michel::0000-0003-1844-3515
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage249
dc.source.endpage252
dc.source.conferenceUltra Clean Processing of Silicon Surfaces; Proceedings of the 4th International Symposium on Ultra Clean Processing of Silicon
dc.source.conferencedate21/09/1998
dc.source.conferencelocationOostende Belgium
imec.availabilityPublished - open access
imec.internalnotesSolid State Phenomena; Vols. 65-66


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