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Architecture of a novel low-cost hardware neural network

dc.contributor.authorKhalil, K.
dc.contributor.authorEldash, O.
dc.contributor.authorDey, Bappaditya
dc.contributor.authorKumar, A.
dc.contributor.authorBayoumi, M.
dc.date.accessioned2021-10-28T23:15:52Z
dc.date.available2021-10-28T23:15:52Z
dc.date.issued2020
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/35379
dc.sourceIIOimport
dc.titleArchitecture of a novel low-cost hardware neural network
dc.typeProceedings paper
dc.contributor.imecauthorDey, Bappaditya
dc.contributor.orcidimecDey, Bappaditya::0000-0002-0886-137X
dc.source.peerreviewyes
dc.source.conference2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)
dc.source.conferencedate9/08/2020
dc.source.conferencelocationSpringfield, MA USA
dc.identifier.urlhttps://ieeexplore.ieee.org/document/9184585
imec.availabilityPublished - imec


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