dc.contributor.author | Renukaswamy, Pratap | |
dc.contributor.author | Markulic, Nereo | |
dc.contributor.author | Park, Sehoon | |
dc.contributor.author | Kankuppe Raghavendra Swamy, Anirudh Praveen | |
dc.contributor.author | Wambacq, Piet | |
dc.contributor.author | Craninckx, Jan | |
dc.date.accessioned | 2021-10-29T02:59:12Z | |
dc.date.available | 2021-10-29T02:59:12Z | |
dc.date.issued | 2020 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/35827 | |
dc.source | IIOimport | |
dc.title | A 12mW 10GHz FMCW PLL based on an integrating DAC with 90kHz rms frequency error for 23MHz/µs slope and 1.2GHz chirp bandwidth | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Renukaswamy, Pratap | |
dc.contributor.imecauthor | Markulic, Nereo | |
dc.contributor.imecauthor | Park, Sehoon | |
dc.contributor.imecauthor | Kankuppe Raghavendra Swamy, Anirudh Praveen | |
dc.contributor.imecauthor | Wambacq, Piet | |
dc.contributor.imecauthor | Craninckx, Jan | |
dc.contributor.orcidimec | Renukaswamy, Pratap::0000-0003-4148-7188 | |
dc.contributor.orcidimec | Markulic, Nereo::0000-0001-6691-4647 | |
dc.contributor.orcidimec | Kankuppe Raghavendra Swamy, Anirudh Praveen::0000-0002-0114-1193 | |
dc.contributor.orcidimec | Wambacq, Piet::0000-0003-4388-7257 | |
dc.contributor.orcidimec | Craninckx, Jan::0000-0002-3980-0203 | |
dc.source.peerreview | yes | |
dc.source.conference | 2020 IEEE International Solid- State Circuits Conference - (ISSCC) | |
dc.source.conferencedate | 16/02/2020 | |
dc.source.conferencelocation | San Francisco, CA USA | |
dc.identifier.url | https://ieeexplore.ieee.org/document/9063080 | |
imec.availability | Published - imec | |