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A methodology for power efficient partitioning of data-dominated algorithm specifications within performance constraints

dc.contributor.authorMasselos, Kostas
dc.contributor.authorDanckaert, Koen
dc.contributor.authorCatthoor, Francky
dc.contributor.authorGoutis, C. E.
dc.contributor.authorDe Man, Hugo
dc.date.accessioned2021-10-14T11:30:23Z
dc.date.available2021-10-14T11:30:23Z
dc.date.issued1999
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/3664
dc.sourceIIOimport
dc.titleA methodology for power efficient partitioning of data-dominated algorithm specifications within performance constraints
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.imecauthorDe Man, Hugo
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.source.peerreviewno
dc.source.beginpage270
dc.source.endpage272
dc.source.conferenceProceedings IEEE International Symposium on Low Power Electronics and Design - ISLPED
dc.source.conferencedate16/08/1999
dc.source.conferencelocationSan Diego, CA USA
imec.availabilityPublished - imec


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