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A 10.1 ENOB, 6.2fJ/con.-step, 500MS/s ringamp-based pipelined-SAR ADC with background calibration and dynamic reference regulation in 16nm CMOS

dc.contributor.authorLagos Benites, Jorge
dc.contributor.authorMarkulic, Nereo
dc.contributor.authorHershberg, Benjamin
dc.contributor.authorDermit, Davide
dc.contributor.authorShrivas, Mithlesh
dc.contributor.authorMartens, Ewout
dc.contributor.authorCraninckx, Jan
dc.date.accessioned2021-10-31T09:21:17Z
dc.date.available2021-10-31T09:21:17Z
dc.date.issued2021
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/36878
dc.sourceIIOimport
dc.titleA 10.1 ENOB, 6.2fJ/con.-step, 500MS/s ringamp-based pipelined-SAR ADC with background calibration and dynamic reference regulation in 16nm CMOS
dc.typeProceedings paper
dc.contributor.imecauthorLagos Benites, Jorge
dc.contributor.imecauthorMarkulic, Nereo
dc.contributor.imecauthorHershberg, Benjamin
dc.contributor.imecauthorDermit, Davide
dc.contributor.imecauthorShrivas, Mithlesh
dc.contributor.imecauthorMartens, Ewout
dc.contributor.imecauthorCraninckx, Jan
dc.contributor.orcidimecMarkulic, Nereo::0000-0001-6691-4647
dc.contributor.orcidimecShrivas, Mithlesh::0000-0001-6063-2059
dc.contributor.orcidimecCraninckx, Jan::0000-0002-3980-0203
dc.identifier.doi
dc.source.peerreviewyes
dc.source.conference2021 Symposium on VLSI Circuits
dc.source.conferencedate13/06/2021
dc.source.conferencelocationKyoto Japan
dc.identifier.urlhttps://ieeexplore.ieee.org/document/9492354
imec.availabilityPublished - imec


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