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A 77-dB DR 16-Ch 2nd-order $D- $D $R Neural Recording Chip with 0.0077mm2/Ch

dc.contributor.authorWang, Shiwei
dc.contributor.authorBallini, Marco
dc.contributor.authorYang, Xiaolin
dc.contributor.authorSawigun, Chutham
dc.contributor.authorWeijers, Jan-Willem
dc.contributor.authorBiswas, Dwaipayan
dc.contributor.authorMora Lopez, Carolina
dc.date.accessioned2021-10-31T12:39:40Z
dc.date.available2021-10-31T12:39:40Z
dc.date.issued2021
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/37367
dc.sourceIIOimport
dc.titleA 77-dB DR 16-Ch 2nd-order $D- $D $R Neural Recording Chip with 0.0077mm2/Ch
dc.typeProceedings paper
dc.contributor.imecauthorWang, Shiwei
dc.contributor.imecauthorBallini, Marco
dc.contributor.imecauthorYang, Xiaolin
dc.contributor.imecauthorSawigun, Chutham
dc.contributor.imecauthorWeijers, Jan-Willem
dc.contributor.imecauthorBiswas, Dwaipayan
dc.contributor.imecauthorMora Lopez, Carolina
dc.contributor.orcidimecYang, Xiaolin::0000-0001-9900-528X
dc.contributor.orcidimecSawigun, Chutham::0000-0001-7179-0343
dc.contributor.orcidimecWeijers, Jan-Willem::0000-0003-1503-8346
dc.contributor.orcidimecMora Lopez, Carolina::0000-0003-4200-0001
dc.identifier.doi
dc.source.peerreviewyes
dc.source.conference2021 Symposium on VLSI Circuits
dc.source.conferencedate13/06/2021
dc.source.conferencelocationKyoto Japan
dc.identifier.urlhttps://ieeexplore.ieee.org/document/9492482
imec.availabilityPublished - imec


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