CV Stretch-Out Correction after Bias Temperature Stress: Work-function Dependence of Donor-/Acceptor-like Traps, Fixed Charges, and Fast States

Abstract

Capacitance-voltage (CV) measurements on MOS structures are inherently difficult to analyze due to the so called stretch-out, which results from defects becoming charged during the slow sweep and shifts the CV curve to lower or higher voltages without otherwise changing its shape. This stretch-out dramatically interferes which the actual target of the measurement, the extraction of the contribution of traps to the frequency-dependent small signal capacitance, potentially resulting in enormous spurious contributions to the extracted defect densities. Assuming that the slow states responsible for this stretch-out are normally distributed in energy, we suggest a simple correction algorithm and demonstrate its applicability using experimental NBTI/PBTI data on nMOS/pMOS devices to evaluate the creation of the various defect types as well as their work-function dependence.