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Buried power SRAM DTCO and system-level benchmarking in N3

dc.contributor.authorSalahuddin, Shairfe Muhammad
dc.contributor.authorPerumkunnil, Manu
dc.contributor.authorDentoni Litta, Eugenio
dc.contributor.authorGupta, Anshul
dc.contributor.authorWeckx, Pieter
dc.contributor.authorRyckaert, Julien
dc.contributor.authorNa, Myung Hee
dc.contributor.authorSpessot, Alessio
dc.date.accessioned2021-12-14T09:35:54Z
dc.date.available2021-11-02T15:59:09Z
dc.date.available2021-12-14T09:35:54Z
dc.date.issued2020
dc.identifier.issn0743-1562
dc.identifier.otherWOS:000668063000062
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/37745.2
dc.sourceWOS
dc.titleBuried power SRAM DTCO and system-level benchmarking in N3
dc.typeProceedings paper
dc.contributor.imecauthorSalahuddin, S.
dc.contributor.imecauthorPerumkunnil, M.
dc.contributor.imecauthorLitta, E. Dentoni
dc.contributor.imecauthorGupta, A.
dc.contributor.imecauthorWeckx, P.
dc.contributor.imecauthorRyckaert, J.
dc.contributor.imecauthorNa, M. H.
dc.contributor.imecauthorSpessot, A.
dc.contributor.imecauthorSalahuddin, Shairfe Muhammad
dc.contributor.imecauthorPerumkunnil, Manu
dc.contributor.imecauthorDentoni Litta, Eugenio
dc.contributor.imecauthorGupta, Anshul
dc.contributor.imecauthorWeckx, Pieter
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.imecauthorNa, Myung Hee
dc.contributor.imecauthorSpessot, Alessio
dc.contributor.orcidimecSalahuddin, Shairfe Muhammad::0000-0002-6483-8430
dc.contributor.orcidimecDentoni Litta, Eugenio::0000-0003-0333-376X
dc.identifier.eisbn978-1-7281-6460-1
dc.source.numberofpages2
dc.source.peerreviewyes
dc.source.conferenceIEEE Symposium on VLSI Technology and Circuits
dc.source.conferencedateJUN 15-19, 2020
dc.source.conferencelocationHonolulu, HI, USA
dc.source.journalna
imec.availabilityPublished - imec


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220.500.12860/37745.2*2021-12-14T09:30:41Zvalidation by library/open access desk
120.500.12860/377452021-11-02T15:59:09Z

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