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SOT-MRAM based Analog in-Memory Computing for DNN inference

dc.contributor.authorDoevenspeck, Jonas
dc.contributor.authorGarello, Kevin
dc.contributor.authorVerhoef, Bram
dc.contributor.authorDegraeve, Robin
dc.contributor.authorVan Beek, Simon
dc.contributor.authorCrotti, Davide
dc.contributor.authorYasin, Farrukh
dc.contributor.authorCouet, Sebastien
dc.contributor.authorJayakumar, Ganesh
dc.contributor.authorPapistas, Ioannis
dc.contributor.authorDebacker, Peter
dc.contributor.authorLauwereins, Rudy
dc.contributor.authorDehaene, Wim
dc.contributor.authorKar, Gouri Sankar
dc.contributor.authorCosemans, Stefan
dc.contributor.authorMallik, Arindam
dc.contributor.authorVerkest, Diederik
dc.date.accessioned2021-12-14T11:56:55Z
dc.date.available2021-11-02T15:59:10Z
dc.date.available2021-12-14T11:56:55Z
dc.date.issued2020
dc.identifier.issn0743-1562
dc.identifier.otherWOS:000668063000083
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/37749.2
dc.sourceWOS
dc.titleSOT-MRAM based Analog in-Memory Computing for DNN inference
dc.typeProceedings paper
dc.contributor.imecauthorDoevenspeck, J.
dc.contributor.imecauthorGarello, K.
dc.contributor.imecauthorVerhoef, B.
dc.contributor.imecauthorDegraeve, R.
dc.contributor.imecauthorVan Beek, S.
dc.contributor.imecauthorCrotti, D.
dc.contributor.imecauthorYasin, F.
dc.contributor.imecauthorCouet, S.
dc.contributor.imecauthorJayakumar, G.
dc.contributor.imecauthorPapistas, I. A.
dc.contributor.imecauthorDebacker, P.
dc.contributor.imecauthorLauwereins, R.
dc.contributor.imecauthorDehaene, W.
dc.contributor.imecauthorKar, G. S.
dc.contributor.imecauthorCosemans, S.
dc.contributor.imecauthorMallik, A.
dc.contributor.imecauthorVerkest, D.
dc.contributor.imecauthorDoevenspeck, Jonas
dc.contributor.imecauthorGarello, Kevin
dc.contributor.imecauthorVerhoef, Bram
dc.contributor.imecauthorDegraeve, Robin
dc.contributor.imecauthorVan Beek, Simon
dc.contributor.imecauthorCrotti, Davide
dc.contributor.imecauthorYasin, Farrukh
dc.contributor.imecauthorCouet, Sebastien
dc.contributor.imecauthorJayakumar, Ganesh
dc.contributor.imecauthorPapistas, Ioannis
dc.contributor.imecauthorDebacker, Peter
dc.contributor.imecauthorLauwereins, Rudy
dc.contributor.imecauthorDehaene, Wim
dc.contributor.imecauthorKar, Gouri Sankar
dc.contributor.imecauthorCosemans, Stefan
dc.contributor.imecauthorMallik, Arindam
dc.contributor.imecauthorVerkest, Diederik
dc.contributor.orcidimecVan Beek, Simon::0000-0002-2499-4172
dc.contributor.orcidimecYasin, Farrukh::0000-0002-7295-0254
dc.contributor.orcidimecCouet, Sebastien::0000-0001-6436-9593
dc.contributor.orcidimecDebacker, Peter::0000-0003-3825-5554
dc.contributor.orcidimecLauwereins, Rudy::0000-0002-3861-0168
dc.contributor.orcidimecMallik, Arindam::0000-0002-0742-9366
dc.contributor.orcidimecVerkest, Diederik::0000-0001-6567-2746
dc.identifier.eisbn978-1-7281-6460-1
dc.source.numberofpages2
dc.source.peerreviewyes
dc.source.conferenceIEEE Symposium on VLSI Technology and Circuits
dc.source.conferencedateJUN 15-19, 2020
dc.source.conferencelocationHonolulu, HI, USA
dc.source.journalna
imec.availabilityPublished - imec


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220.500.12860/37749.2*2021-12-14T11:50:39Zvalidation by library/open access desk
120.500.12860/377492021-11-02T15:59:10Z

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