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A Novel Design Reversible logic based Configurable Fault-Tolerant Embryonic Hardware
dc.contributor.author | Khalil, Kasem | |
dc.contributor.author | Dey, Bappaditya | |
dc.contributor.author | Sherazi, Yasser | |
dc.contributor.author | Kumar, Ashok | |
dc.contributor.author | Bayoumi, Magdy | |
dc.date.accessioned | 2021-11-11T03:04:05Z | |
dc.date.available | 2021-11-11T03:04:05Z | |
dc.date.issued | 2020 | |
dc.identifier.issn | 0271-4302 | |
dc.identifier.other | WOS:000706854700455 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/38418 | |
dc.source | WOS | |
dc.title | A Novel Design Reversible logic based Configurable Fault-Tolerant Embryonic Hardware | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Dey, Bappaditya | |
dc.contributor.imecauthor | Sherazi, Yasser | |
dc.contributor.orcidimec | Dey, Bappaditya::0000-0002-0886-137X | |
dc.identifier.eisbn | 978-1-7281-3320-1 | |
dc.source.numberofpages | 5 | |
dc.source.peerreview | yes | |
dc.source.conference | IEEE International Symposium on Circuits and Systems (ISCAS) | |
dc.source.conferencedate | OCT 10-21, 2020 | |
imec.availability | Under review |
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