Notice
This item has not yet been validated by imec staff.
Notice
This is not the latest version of this item. The latest version can be found at: https://imec-publications.be/handle/20.500.12860/38543.2
High-density SOT-MRAM technology and design specifications for the embedded domain at 5nm node
dc.contributor.author | Gupta, M. | |
dc.contributor.author | Perumkunnil, M. | |
dc.contributor.author | Garello, K. | |
dc.contributor.author | Rao, S. | |
dc.contributor.author | Yasin, F. | |
dc.contributor.author | Kar, G. S. | |
dc.contributor.author | Furnemont, A. | |
dc.date.accessioned | 2021-12-06T02:06:18Z | |
dc.date.available | 2021-12-06T02:06:18Z | |
dc.date.issued | 2020 | |
dc.identifier.issn | 2380-9248 | |
dc.identifier.other | WOS:000717011600177 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/38543 | |
dc.source | WOS | |
dc.title | High-density SOT-MRAM technology and design specifications for the embedded domain at 5nm node | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Gupta, M. | |
dc.contributor.imecauthor | Perumkunnil, M. | |
dc.contributor.imecauthor | Garello, K. | |
dc.contributor.imecauthor | Rao, S. | |
dc.contributor.imecauthor | Yasin, F. | |
dc.contributor.imecauthor | Kar, G. S. | |
dc.contributor.imecauthor | Furnemont, A. | |
dc.identifier.doi | 10.1109/IEDM13553.2020.9372068 | |
dc.identifier.eisbn | 978-1-7281-8888-1 | |
dc.source.numberofpages | 4 | |
dc.source.peerreview | yes | |
dc.source.conference | IEEE International Electron Devices Meeting (IEDM) | |
dc.source.conferencedate | DEC 12-18, 2020 | |
imec.availability | Under review |