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dc.contributor.authorChen, R.
dc.contributor.authorWeckx, P.
dc.contributor.authorSalahuddin, S. M.
dc.contributor.authorKim, S-W
dc.contributor.authorSisto, G.
dc.contributor.authorVan der Plas, G.
dc.contributor.authorStucchi, M.
dc.contributor.authorBaert, R.
dc.contributor.authorDebacker, P.
dc.contributor.authorNa, M. H.
dc.contributor.authorRyckaert, J.
dc.contributor.authorMilojevic, D.
dc.contributor.authorBeyne, E.
dc.date.accessioned2021-12-06T02:06:36Z
dc.date.available2021-12-06T02:06:36Z
dc.date.issued2020
dc.identifier.issn2380-9248
dc.identifier.otherWOS:000717011600017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/38552
dc.sourceWOS
dc.title3D-optimized SRAM Macro Design and Application to Memory-on-Logic 3D-IC at Advanced Nodes
dc.typeProceedings paper
dc.contributor.imecauthorChen, R.
dc.contributor.imecauthorWeckx, P.
dc.contributor.imecauthorSalahuddin, S. M.
dc.contributor.imecauthorKim, S-W
dc.contributor.imecauthorSisto, G.
dc.contributor.imecauthorVan der Plas, G.
dc.contributor.imecauthorStucchi, M.
dc.contributor.imecauthorBaert, R.
dc.contributor.imecauthorDebacker, P.
dc.contributor.imecauthorNa, M. H.
dc.contributor.imecauthorRyckaert, J.
dc.contributor.imecauthorMilojevic, D.
dc.contributor.imecauthorBeyne, E.
dc.identifier.doi10.1109/IEDM13553.2020.9371905
dc.identifier.eisbn978-1-7281-8888-1
dc.source.numberofpages4
dc.source.peerreviewyes
dc.source.conferenceIEEE International Electron Devices Meeting (IEDM)
dc.source.conferencedateDEC 12-18, 2020
imec.availabilityUnder review


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