A TCAD Compatible SONOS Trapping Layer Model for Accurate Programming Dynamics

Abstract

We present a TCAD model for the accurate description of charging kinetics of trapping layers in 3D gate-all-around VNAND SONOS devices. We build on the established description of the trapping layer as trap-rich semiconductor and show that a strongly field-dependent carrier mobility greatly improves the reproduction of experimental incremental step pulse programming (ISPP) slopes. The resulting model was implemented in a commercial TCAD simulator and shown to accurately predict ISPP and retention loss measurement data with one consistent parameter set.