Now showing items 1-2 of 2

    • Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node 

      Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020)
    • Inflection points in interconnect research and trends for 2nm and beyond in order to solve the RC bottleneck 

      Tokei, Zsolt; Vega Gonzalez, Victor; Murdoch, Gayle; O'Toole, Martin; Croes, Kristof; Baert, Rogier; van der Veen, Marleen; Adelmann, Christoph; Soulie, Jean-Philippe; Boemmels, Juergen; Wilson, Chris; Park, Seongho; Sankaran, Kiroubanand; Pourtois, Geoffrey; Swerts, Johan; Paolillo, Sara; Decoster, Stefan; Mao, Ming; Lazzarino, Frederic; Versluijs, Janko; Blanco, Victor; Ercken, Monique; Kesters, Els; Le, Quoc Toan; Holsteyns, Frank; Heylen, Nancy; Teugels, Lieve; Devriendt, Katia; Struyf, Herbert; Morin, Pierre; Jourdan, Nicolas; Van Elshocht, Sven; Ciofi, Ivan; Gupta, Anshul; Zahedmanesh, Houman; Vanstreels, Kris; Na, Myung Hee (2020)