Show simple item record

A vertical Si/Si1-xGex heterojunction pMOSFET with reduced DIBL sensitivity, using a novel gate dielectric approach

dc.contributor.authorVerheyen, P.
dc.contributor.authorCollaert, Nadine
dc.contributor.authorCaymax, Matty
dc.contributor.authorLoo, Roger
dc.contributor.authorDe Meyer, Kristin
dc.contributor.authorVan Rossum, Marc
dc.date.accessioned2021-10-14T11:55:09Z
dc.date.available2021-10-14T11:55:09Z
dc.date.issued1999
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/4004
dc.sourceIIOimport
dc.titleA vertical Si/Si1-xGex heterojunction pMOSFET with reduced DIBL sensitivity, using a novel gate dielectric approach
dc.typeProceedings paper
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorCaymax, Matty
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.source.peerreviewno
dc.source.beginpage19
dc.source.endpage22
dc.source.conference1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers; 8-10 June 1999; Tai
dc.source.conferencelocation
imec.availabilityPublished - imec


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following collection(s)

Show simple item record