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A 70nm vertical Si/Si1-xGex heterojunction pMOSFET with reduced DIBL sensitivity for VLSI applications

dc.contributor.authorVerheyen, Peter
dc.contributor.authorCollaert, Nadine
dc.contributor.authorCaymax, Matty
dc.contributor.authorLoo, Roger
dc.contributor.authorDe Meyer, Kristin
dc.contributor.authorVan Rossum, Marc
dc.date.accessioned2021-10-14T11:55:16Z
dc.date.available2021-10-14T11:55:16Z
dc.date.issued1999
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/4005
dc.sourceIIOimport
dc.titleA 70nm vertical Si/Si1-xGex heterojunction pMOSFET with reduced DIBL sensitivity for VLSI applications
dc.typeProceedings paper
dc.contributor.imecauthorVerheyen, Peter
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorCaymax, Matty
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.conferenceSilicon Nanoelectronics Workshop Abstracts
dc.source.conferencedate12/06/1999
dc.source.conferencelocationKyoto Japan
imec.availabilityPublished - open access


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