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dc.contributor.authorGilardi, C.
dc.contributor.authorChehab, B.
dc.contributor.authorSisto, G.
dc.contributor.authorSchuddinck, P.
dc.contributor.authorAhmed, Z.
dc.contributor.authorZografos, O.
dc.contributor.authorLin, Q.
dc.contributor.authorHellings, G.
dc.contributor.authorRyckaert, J.
dc.contributor.authorWong, H-S P.
dc.contributor.authorMitra, S.
dc.date.accessioned2022-07-09T02:28:02Z
dc.date.available2022-07-09T02:28:02Z
dc.date.issued2021
dc.identifier.issn2380-9248
dc.identifier.otherWOS:000812325400173
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/40094
dc.sourceWOS
dc.titleExtended Scale Length Theory Targeting Low-Dimensional FETs for Carbon Nanotube FET Digital Logic Design-Technology Co-optimization
dc.typeProceedings paper
dc.contributor.imecauthorChehab, B.
dc.contributor.imecauthorSisto, G.
dc.contributor.imecauthorSchuddinck, P.
dc.contributor.imecauthorAhmed, Z.
dc.contributor.imecauthorZografos, O.
dc.contributor.imecauthorHellings, G.
dc.contributor.imecauthorRyckaert, J.
dc.identifier.doi10.1109/IEDM19574.2021.9720672
dc.identifier.eisbn978-1-6654-2572-8
dc.source.numberofpages4
dc.source.peerreviewyes
dc.source.conferenceIEEE International Electron Devices Meeting (IEDM)
dc.source.conferencedateDEC 11-16, 2021
dc.source.conferencelocationSan Francisco
imec.availabilityUnder review


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