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Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate Simulation
dc.contributor.author | Huppert, Quentin | |
dc.contributor.author | Evenblij, Timon | |
dc.contributor.author | Perumkunnil, Manu | |
dc.contributor.author | Catthoor, Francky | |
dc.contributor.author | Torres, Lionel | |
dc.contributor.author | Novo, David | |
dc.date.accessioned | 2022-07-18T02:27:52Z | |
dc.date.available | 2022-07-18T02:27:52Z | |
dc.date.issued | 2021 | |
dc.identifier.other | WOS:000805289900131 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/40137 | |
dc.source | WOS | |
dc.title | Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate Simulation | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Evenblij, Timon | |
dc.contributor.imecauthor | Perumkunnil, Manu | |
dc.contributor.imecauthor | Catthoor, Francky | |
dc.contributor.orcidimec | Evenblij, Timon::0000-0002-5337-0617 | |
dc.contributor.orcidimec | Perumkunnil, Manu::0000-0002-0029-6548 | |
dc.contributor.orcidimec | Catthoor, Francky::0000-0002-3599-8515 | |
dc.identifier.eisbn | 978-3-9819263-5-4 | |
dc.source.numberofpages | 4 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 707 | |
dc.source.endpage | 710 | |
dc.source.conference | Design, Automation and Test in Europe Conference and Exhibition (DATE) | |
dc.source.conferencedate | FEB 01-05, 2021 | |
imec.availability | Under review |
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